Digital Fundamentals CETT-1425 Spring 2012 01/17/2012 - 05/13/2012 Course Information Section 002 Lecture TTh 4:15PM - 6:55PM RVSS 110 Kurt Nalty knalty@austincc.edu (512) 223.6268 Office Hours * M T W Th 2:00PM - 4:00PM RVSS 100B Other hours available by appointment Course Requirements Course Evaluation/Grading System Test #1 - 20% Test #2 - 20% Test #3 - 20% Test #4 (Comprehensive) - 20% Homework and Laboratory Exercises - %20 Based on the total course score calculation above, your final course grade will be as follows: A: 90-100 B: 80-89 C: 70-79 D: 60-69 F: Below 60 Spring 2012 Course Class Calendar Test #1 - February 7 Test #2 - March 8 Test #3 - April 19 Test #4 - May 10 Textbook Digital Systems: Principles and Applications (11th Edition) by Ronald Tocci Pearson [ISBN-10: 9780135103821] Readings Course Outline/Reading Assignments Text: Digital Systems by Ronald Tocci, Eleventh edition ISBN-10: 0135103827 ISBN-13: 978-0135103821 We will cover the entire book during the semester. Reading assignments are details in the schedule below. semester calendar/important dates 2012 January February March Su Mo Tu We Th Fr Sa Su Mo Tu We Th Fr Sa Su Mo Tu We Th Fr Sa 1 2 3 4 1 2 3 5 6 7 8 9 10 11 4 5 6 7 8 9 10 17 18 19 20 21 12 13 14 15 16 17 18 11 Spring Break 17 22 23 24 25 26 27 28 19 20 21 22 23 24 25 18 19 20 21 22 23 24 29 30 31 26 27 28 29 25 26 27 28 29 30 31 April May Su Mo Tu We Th Fr Sa Su Mo Tu We Th Fr Sa 1 2 3 4 5 6 7 1 2 3 4 5 8 9 10 11 12 13 14 6 7 8 9 10 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Classes begin January 17 Drop Deadline April 23 Classes End May 10 Test Dates February 7 March 8 April 19 May 10 Course Subjects Instructional Methodologies Lecture and la b exercises will be the primary forms of instruction. Course Outline/Reading Assignments +----------------------------------------------------------------------------------------------------------------------------------+ | Class | Day |Date |Topic |Reading | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | | | |Introductory Concepts | | | 1 | T |Jan 17 |Aristotlean Logic |Chapter 1 | | | | |SPST Switches | | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | | | |Number Systems and Codes | | | 2 | Th |Jan 19 |Altera Quartus Software |Chapter 2 | | | | |SPDT Switches | | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | | | |Fundamental Logic Gates | | | 3 | T |Jan 24 |Describing Logic Circuits |Chapter 3 | | | | |Active High versus Active Low | | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | 4 | Th |Jan 26 |ANSI Symbols |Chapter 4 | | | | |Combinatorial Logic Circuits | | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | 5 | T |Jan 31 |Karnaugh Maps |Chapter 4 | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | 6 | Th |Feb 2 |VHDL and Verilog Logic Programming Languages |Sections 3-19,3-20,4-15,4-16,4-17 | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | 7 | T |Feb 7 |Test #1 | | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | | | |NAND Gate Latch | | | 8 | Th |Feb 9 |NOR Gate Latch |Section 5-1 through Section 5-4 | | | | |Edge Detectors | | | | | |Timing Diagrams | | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | | | |D Latch | | | | | |D flip-flop | | | 9 | T |Feb 14 |SR flip-flop |Section 5-5 through Section 5-10 | | | | |T flip-flop | | | | | |JK flip-flop | | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | | | |Asynchronous Inputs | | | | | |Propagation Delay | | | 10 | Th |Feb 16 |Setup and hold times |Section 5-11 through Section 5-18 | | | | |Registers | | | | | |Shift Registers | | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | | | |Ripple Counters | | | 11 | T |Feb 21 |Frequency Division |Sections 5-19, 5-20 | | | | |ANSI symbols | | | | | |LPM modules | | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | 12 | Th |Feb 23 |Microprocess Interfacing |Sections 5-21, 5-22 | | | | |Schmitt Trigger Devices | | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | | | |One-Shots | | | 13 | T |Feb 28 |555 timers |Sections 5-23, 5-24 | | | | |Switch Debouncing | | | | | |Multivibrator | | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | 14 | Th |Mar 1 |Ceramic and Crystals | | | | | |Single Package Oscillators | | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | 15 | T |Mar 6 |VHDL Sequential Circuits |Sections 5-25 through 5-27 | | | | |VHDL Hierarchial Design | | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | 16 | Th |Mar 8 |Test #2 |(Spring Break Afterward) | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | 17 | T |Mar 20 |Sign versus Unsigned Numbers |Chapter 6 | | | | |Adder/Subtractor | | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | | | |Counters and Registers | | | 18 | Th |Mar 22 |LPM_Counter |Sections 7-1 through 7-8 | | | | |Persistence of Vision | | | | | |Clock_Div block | | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | 19 | T |Mar 27 |Legacy TTL Libraries and Design Migration |Sections 7-9 through 7-19 | | | | |PIPO, SISO, PISO, SIPO | | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | | | |Ring Counters | | | 20 | Th |Mar 29 |State Machines |Section 7-14, Sections 7-20 though 7-24| | | | |VHDL State Machines | | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | 21 | T |Apr 3 |TTL, ECL, NMOS, PMOS, CMOS Hardware Families |Chapter 8 | | | | |Electrostatic Discharge (ESD) | | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | 22 | Th |Apr 5 |Open Collector/Drain |Chapter 8 | | | | |Tristate Devices | | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | | | |Seven-Segment Display Decoder | | | | | |LCD Displays | | | 23 | T |Apr 10 |General Decoders |Sections 9-1 through 9-5 | | | | |Encoders | | | | | |Priority Encoders | | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | | | |Multiplexers | | | 24 | Th |Apr 12 |Demultiplexers |Sections 9-6 through 9-11 | | | | |Magnitude Comparators | | | | | |Code Converters | | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | 25 | T |Apr 17 |Data Busses |Sections 9-12 through 9-20 | | | | |VHDL Implementations | | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | 26 | Th |Apr 19 |Test #3 | | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | | | |Stepper Motors | | | | | |Keypad Encoder | | | 27 | T |Apr 24 |Rotary Encoder |Sections 10-1 through 10-5 | | | | |Digital Clock | | | | | |Frequency Counter | | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | 28 | Th |Apr 26 |Thanksgiving Holiday | | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | 29 | T |May 1 |D/A, A/D Converters |Chapter 11 | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | 30 | Th |May 3 |Memory Devices |Chapter 12 | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | 31 | T |May 8 |PLD Families |Chapter 13 | |--------+--------+----------------+-------------------------------------------------------+---------------------------------------| | 32 | Th |May 10 |Test #4 (Final Exam) | | +----------------------------------------------------------------------------------------------------------------------------------+ Student Learning Outcomes/Learning Objectives Course Rationale Digital Logic is embed ded in almost every electronic device. You must know digital logic to be able to test and repair electronic equipment. Texas WECM Description and Objectives Course Description: An entry level course in digital electronics covering number systems, binary mathematics, digital codes, logic gates, Boolean algebra, Karnaugh maps, and combination logic. Emphasis on circuit logic analysis and troubleshooting digital circuits. End-of-Course Outcomes: Students will know boolean logic, combinatorial logic, timing diagrams, flip flop circuits and state machines. Students will know conventional logic levels, active high versus active low logic, binary, octal and hex number systems. Student will use discrete and programmable logic. Students will be able to specify, design, implement and test logic circuits. Course policies Attendance Attendance is expected and is considered when determining the final grade for this course. You cannot develop the proficiency required for this course just studying the textbook. Lectures may include material not covered in the textbook. At my discretion, I may withdraw students who have three or more unexcused absences. If you cannot attend a particular class session, please discuss the conflict with me in advance (in person, via phone or email). Reference: http://www2.austin.cc.tx.us./admrule/4.01.002.htm Withdrawal If circumstances arise such that you cannot complete this course, it is to your advantage to drop the class by the deadline to avoid getting an unsatisfactory grade on your permanent school record. Students or instructors may initiate withdrawals anytime during the semester before the official withdrawal deadline. Please note that the state of Texas limits students to a maximum lifetime count of six (6) withdrawals. The last day to withdraw is April 23. Students may be withdrawn from the course by the instructor for non-attendance. However, it is ultimately the responsibility of the student to initiate the withdrawal process if they are unable to attend or complete their coursework as required. Failure to withdraw by the established deadline will result in a grade of A, B, C, D, or F, based on the students recorded performance in the course. Withdrawal forms are available from campus Admissions and Records offices. Courses from which you withdraw will appear on your record as a grade of W. Reference: http://www2.austin.cc.tx.us./admrule/1.06.003.htm Incompletes A student may receive a temporary grade of I (incomplete) at the end of the semester only if the following conditions are satisfied: The student is unable to complete the course during the semester due to circumstances beyond their control. The student must have earned at least half of the grade points needed to earn at least a C by the end of the semester. Arrangement for an incomplete must be made with the instructor. A Report of Incomplete Grade form must be completed by the instructor and filed with the Program Coordinator. To convert the incomplete I into a grade, the student must submit for grading all work required to complete the course to the instructor by a date specified by the instructor within the next immediately following semester, but absolutely no later than 2 weeks prior to the end of the semester. Incompletes not completed by the date specified automatically become a letter grade of F for the course. Scholastic Dishonesty Acts prohibited by the College for which discipline may be administered include scholastic dishonesty, including but not limited to cheating on an exam or quiz, plagiarizing, and unauthorized collaboration with another in preparing outside work. Academic work submitted by students shall be the result of their thought, research or self-expression. Academic work is defined as, but not limited to tests or quizzes, whether taken electronically or on paper, projects, either individual or group, classroom presentations, and homework. Cases of suspected cheating or plagiarism will be reported directly to the Program Coordinators office. College policies will be strictly followed regarding the investigation of suspected cases and punishments if warranted. If you are unsure about the line between collaboration and cheating, feel free to talk to me before it is too late. Student Discipline Statement Classroom behavior should support and enhance learning. Behavior that disrupts the learning process will be dealt with appropriately, which may include having the student leave class for the rest of that day. In serious cases, disruptive behavior may lead to a student being withdrawn from the class. ACC's policy on student discipline can be found in the Student Handbook, 2002-2003, p. 32. Academic Freedom Each student is strongly encouraged to participate in class. In any classroom situation that includes discussion and critical thinking, there are bound to be many differing viewpoints. These differences enhance the learning experience and create an atmosphere where students and instructors alike will be encouraged to think and learn. On sensitive and volatile topics, students may sometimes disagree not only with each other but also with the instructor. It is expected that faculty and students will respect the views of others when expressed in classroom discussions. Classroom Conduct Cellular phones and pagers are disruptive to the class and should be turned off or made inaudible during lecture. Interpersonal skills are critical to both working with peers and leading others. It is expected that you will be respectful of the opinions and property of others, be aware of and responsive to the effect of ones behavior on others; and, work with others to resolve problems. You are encouraged to work together on lab exercises as collaboration and teamwork are important skills to learn. Working on these exercises, as well as studying together for exams, are good opportunities to develop the ability to collaborate. Ensuring that others within a group pull their weight is also a skill to be learned. However, exams, quizzes, laboratory write-ups, and homework assignments are strictly the individuals responsibility. Office of Students with Disabilities Statement (OSD) Each ACC campus offers support services for students with documented physical or psychological disabilities. Students with disabilities must request reasonable accommodations through the Office for Students with Disabilities on the campus where they expect to take the majority of their classes. Students are encouraged to do this three weeks before the start of the semester. For more information, visit: http://www2.austincc.edu/osd/index.html Testing Center Policy This course cannot use the testing center. wecm/scans/cip information WECM - Workforce Education Course Manual http://www.thecb.state.tx.us/aar/undergraduateed/workforceed/wecm/ Texas WECM Description and Objectives Course Description: An entry level course in digital electronics covering number systems, binary mathematics, digital codes, logic gates, Boolean algebra, Karnaugh maps, and combinational logic. Emphasis on circuit logic analysis and troubleshooting digital circuits. End-of-Course Outcomes: Construct digital circuits such as combinational logic circuits, clocking and timing circuits, and analog-to-digital and digital-to-analog devices; troubleshoot various digital circuits using schematic diagrams; and solve problems involving various numbering systems. SCANS - Secretary's Commission on Achieving Necessary Skills http://wdr.doleta.gov/SCANS/whatwork/whatwork.pdf SCANs Competencies: Acquires & Evaluates Information Organizes and Maintains Information Applies Technology to Task Maintains & Troubleshoots Technology Reading Mathematics Listening Problem Solving Seeing Things in the Minds Eye Reasoning Integrity Honesty CIP - Classification of Instructional Programs The Classification of Instructional Programs (CIP) provides a taxonomic scheme that supports the accurate tracking and reporting of fields of study and program completions activity. http://nces.ed.gov/ipeds/cipcode/ CIP CODE Area: 15.1201 Departmental Addendum Degree Audit Students in the electronics department who are seeking a degree or certificate in any speciality, should visit with the electronics student advisor, Vidal Almanza, (RVS Campus, Bldg. G, Student Services, (512) 223-6404; vman@austincc.edu) if they haven't already for a degree audit. GMail All electronics students must check their ACC gmail regularly throught the semester. We will be sending pertinent information about scholarships, the course scheduling needs survey, job opportunities, MSDNA software program, career fairs, special events, and the like through the student GMail system. Declare Major All degree and certificate seeking students should declare their major at the Admissions and Records Office if they have not done so already.